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fDesc[0] = "Libero IDE is a comprehensive software toolset for designing with Microsemi Rad-Tolerant FPGAs, Antifuse FPGAs and Legacy &amp; Discontinued Flash FPGAs and managing the entire design flow from design entry, synthesis and simulation, through place-and-route, timing and power analysis.<br /> Features:<br /> - Powerful project and design flow management.<br /> - Full suite of integrated design entry tools and methodologies.<br /> - Synplify Pro ME synthesis fully optimizes Microsemi FPGA device performance and area utilization.<br /> - Synphony Model Compiler ME performs high-level synthesis optimizations within a Simulink&reg; environment<br /> Modelsim ME VHDL or Verilog behavioral, post-synthesis and post-layout simulation capability.<br /> - Physical design implementation, floorplanning, physical constraints, and layout.<br /> - Timing-driven and power-driven place-and-route.";

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