var fDesc=new Array();
fDesc[0] = "CppSim automatically generates, compiles and runs C code corresponding to the schematic design that you create.<br /> Main features:<br /> - Graphical Interface:<br /> Systems are specified and simulated within a schematic editor, Sue2, and results are viewed using a waveform viewer (CppSimView or GTKWave). <br /> - Analog modules:<br /> A simple text template for each module is filled in by the user which can make use of a rich set of C classes to represent common functions such as filtering, noise, etc. <br /> - Digital modules:<br /> CppSim utilizes Verilator to automatically create C code corresonding to your Verilog modules, and seamlessly integrates this code into your system simulation.";

function tShowHide(id, show)
{
	var s = document.getElementById("desc");

	if ((s.innerHTML.length<=212 || show==1) && show!=2)
	{
		s.innerHTML = fDesc[id];
		if (document.getElementById('m1'))
			document.getElementById('m1').style.display='none';
		if (document.getElementById('m2'))
			document.getElementById('m2').style.display='none';
		if (document.getElementById('more_txt'))
			document.getElementById('more_txt').style.display='inline';
	}
	else
	{
		s.innerHTML = '';
	}
}