var fDesc=new Array(); fDesc[0] = "Active-HDL is a Windows based, integrated FPGA Design Creation and Simulation solution for team-based environments. Active-HDL’s Integrated Design Environment (IDE) includes a full HDL and graphical design tool suite and RTL/gate-level mixed-language simulator for rapid deployment and verification of FPGA designs."; function tShowHide(id, show) { var s = document.getElementById("desc"); if ((s.innerHTML.length<=212 || show==1) && show!=2) { s.innerHTML = fDesc[id]; if (document.getElementById('m1')) document.getElementById('m1').style.display='none'; if (document.getElementById('m2')) document.getElementById('m2').style.display='none'; if (document.getElementById('more_txt')) document.getElementById('more_txt').style.display='inline'; } else { s.innerHTML = ''; } }